All India PG Diploma Program in ASIC Design and Verification at VIT


College NameVellore Institute of Technology, Vellore

About College: VIT was established with the aim of providing quality higher education on par with international standards. It persistently seeks and adopts innovative methods to improve the quality of higher education on a consistent basis.The campus has a cosmopolitan atmosphere with students from all corners of the globe. Experienced and learned teachers are strongly encouraged to nurture the students. The global standards set at VIT in the field of teaching and research spur us on in our relentless pursuit of excellence. In fact, it has become a way of life for us.

Program Name: All India PG Diploma Program in ASIC Design and Verification

Program Date : 1st October 2018 to 30th March 2019

Course outline :
  • Advanced Digital Design
  • Verilog Language and Coding for Synthesis
  • Introduction to ASIC Backend design
  • Functional Verification
  • Advanced Verification Languages - System Verilog
  • DPI and Verification Methodology
  • ASIC Prototyping
  • Project Work

Eligibility: B.E/B.Tech (Any Electronics Branches) /M.E/M.Tech/M.Sc (Electronics)

Course Fees: Rs. 45,000 (Which includes GST + Industry Fab Visit)

Registration Link: Clickhere

Last Date: Last date for registration: 20th September 2018


Contact Details:
Dr. Sakthivel R
Course Co-ordinator
Email: rsakthivel@vit.ac.in,
Mobile: 9994627570

Event Website: Clickhere

College Website: www.vit.ac.in

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